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Digital system and Binary Numbhers, Gate-level Minimization, Combinational Logic, Synchronous Sequntial Logic, shift Registers, Counters, Memory and Programmable Logic, Design at the Register Transfer Level, ASM, Asynchronous Sequential Logic, Model Paper 1 & 2
Additional Information
| Edition | I |
|---|---|
| Pages | 312 |
| ISBN | 978-81-8398-980-0 |
| ISBN | 9788183989800 |
| Year | 2010 |
| Author | ABHISHEK YADAV, D.K. SRIVASTAVA, DEEPAK GARG |
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